Patent literature 1: Japanese Patent No. 5184824 (corresponding to US2010/0223219 A1)
Conventionally, an arithmetic processing apparatus performs arithmetic by a neural network in which multiple processing layers are hierarchically connected. Especially, in an arithmetic processing apparatus performing image recognition, a convolutional neural network corresponds to a core technology.
Conventionally, the convolutional neural network executes convolution arithmetic processing to an extracted result data of a feature quantity corresponding to multiple different arithmetic result data that are obtained from a preceding layer, executes activation processing, and executes pooling processing, so that a feature quantity in a higher dimension is extracted. The inventors of the present disclosure have found the following. Since the conventional convolutional neural network obtains all convolution arithmetic result data required for one pooling processing in one arithmetic cycle, convolution arithmetic portions are required according to the number of the required convolution arithmetic result data. In addition, in order to activate all convolution arithmetic result data required for one pooling processing in one arithmetic cycle, multiple activation means according to the number of the required convolution arithmetic result data are also required. An entire circuit size of an arithmetic processing apparatus that realizes arithmetic processing by a convolutional neural network may enlarge.